SBIR-STTR Award

Voltage surge-induced electronic failures represent a multibillion dollar problem for the U. S. and world microelectronics industry. Typical sources of voltage surge are electrostatic discharge from the human body, line transients from parallel AC power fluctuations, and lightning strikes. In military and missile electronics there exists the particular threat due to electromagnetic pulse (EMP) which can be simulated by a nearby lightning strike. In the actual electronic circuit, the present key step taken to "deflect" over-voltage from hitting the IC device is to place in parallel to an integrated circuit device, a surge arrestor. These vary from metal oxide varistors (MOV) to diodes to gas discharge tubes with each satisfying various operating parameters including trigger or "clamping" voltage and response time. The proposed research focuses on a technology which represents an inexpensive alternative. This is the use of a metal-polymer composite which can exhibit desperately needed combination of low clamp voltages, low capacitance and fast response times. This research is designed towards the more extensive investigation into this materials design approach in order to vastly improve such a device's reliability and powerhandling capability. It is also expected that such research will also shine far greater light on the general theory behind such a material's basic physics. In Phase I we will demonstrate the feasibility of creating such a device and in Phase II we will scale up to address reliability and reproducibility issues. Oryx has already identified several strategic partners for our Phase II effort.

Voltage surge-induced electronic failures represent a multibillion dollar problem for the U. S. and world microelectronics industry. Typical sources of voltage surge are electrostatic discharge (ESD) from the human body, line transients from AC power fluctuations, and lightning strikes. Conventionally, in the actual electronic circuit, the present key step taken to "deflect" over-voltage from hitting the IC device is to place a surge arrestor in parallel to the device. These vary from metal oxide varistors (MOV) to diodes to gas discharge tubes with each satisfying various operating parameters including trigger voltage, "clamping" voltage and response time. The proposed development project will take a concept from the proof-of-principle stage through to a full process protocol that will allow one to fabricate a high volume (up to 50,000 devices/hr), low cost (<1-2cent/device) surge suppressor based on the concept of cutting a "microgap" into a circuit trace on a printed circuit array pattern. Each element will represent a surface-mountable surge suppressor with application in the protection of certain integrated circuit and circuit system from an ESD event. This work will entail the development of adequately conductive circuitry on an appropriate base (FR4), rapid UV laser micro machining of the gap structures with multiplexed beams, and filling of the gaps with an appropriate polymer-based, thick film ink. Following this, these boards will be tested in an automated fashion, gang-saw diced and then tape and reel loaded.