DOE Office of Defense Nuclear Nonproliferation (NA) applications, especially in the area of software radio, drive wide bandwidths and therefore require high-density super-computing-class I/O, memory, and signal processing capabilities. General-purpose processors do not provide enough performance density to effectively address these applications. The introduction of super-computing boards based on (multi-purpose, reconfigurable) Field-Programmable Gate Arrays (FPGA) could provide these extremely high performance densities. However, the effective implementation of applications in FPGA hardware is difficult. In addition to the core computational processing, interface and support cores will be required for effective data movement to memories, busses, and networks, as well as to the system monitoring/management agent. This project will manufacture an advanced Reconfigurable Computing board, the Configurable Software Radio Board (CSRB), based on state-of-the-art Xilinx Virtex II Pro FPGA technology. Phase I developed the architecture and design for the CSRB. The CSRB is capable of 1.5 - 2.5 TeraOps of computing power, 100 Gbps front panel I/O, 4 Gbps backplane I/O, and hosts more than 4 GBytes of on-board memory. System issues such as signal integrity, thermal management, high-current power supplies, current in-rush control, testability, and maintainability were addressed. In Phase II, four copies of the CSRB will be manufactured, tested, and delivered. Commercial Applications and Other Benefits as described by awardee: Sensor signal processing applications, such as found in security surveillance, medical, and target recognition systems, should greatly benefit from the proposed high-density compute board. Target markets include government agencies (specifically DOE), defense labs, defense contractors, telecom companies, wireless telecom companies, and semiconductor companies
