SBIR-STTR Award

A number of wide bandgap semiconductors such as SiC, GaN, and diamond are being considered as the basis for the next generation of high-power and high-temperature electronics. SiC is the most promising materials for near term applications, since it shares many common features with Si processing and the recent advances in the growth of both bulk SiC crystals and epitaxial layers have made high quality materials available for in-depth studies of their electrical properties. Many military and commercial systems today are requiring high temperature electronics to run smaller system size at high performance level. Jet Process Corporation (JPC) has recently cooperated with Yale University on successful demonstration of high quality MNS capacitors, in which the silicon nitride layer is produced by Jet Vapor Deposition Process TM (JVD*TM) on silicon carbide substrates. Our MNS (Metal-SiN-SiC) capacitors show that JVD nitride can form a high quality inversion layer on the SiC surface with low density of fix charge, low current density and high breakdown voltage. JVD*TM is a patented, low cost, pollution free, and scalable process. In Phase I, we will deposit thin gate JVD nitride layers for MNS capacitors and MNSFETs on SiC to investigate the details of electrical performance at 350 degrees C and possible mechanism for high temperature operation, in order to establish an optimized JVD process for making high quality MNS devices and integrated circuits with high reproducibility, reliability, and testability. In Phase II, we will work with industry to design and fabricate prototype switching devices on SiC wafers to demonstrate the feasibility of JVD silicon nitride MNSFETs devices on SiC technology

Keywords:
gate-quality silicon nitride on sic low density of interface trap scale-up capability

During our Phase I effort, Jet Process Corporation (JPC) has achieved substantial success in developing our patented Jet Vapor Deposition process for gate dielectric layers for use in integrated Silicon Carbide (SiC) semiconductor power devices. SiC test capacitors have been fabricated by JPC in collaboration with Yale University. These Phase I test devices have been measured by Army Research Labs and Cree Research Inc.; both gorups are leaders in SiC device technology. The electrical data indicate that JVD dielectric layers hold extraordinary promise to enable power devices, particularly for p-type substrates. These results have already generated considerable enthusiasm within the SiC R&D community: JPC was invited to submit a related proposal to the U.S. Army TACOM for Phase III product development. We propose here in Phase II to continue to advance the science and technology of JVD process dielectric films to enable fabrication of high performance SiC power transistor devices to meet emerging DoD requirements for electrical system control. JPC will commercialize results of this effort by selling JVD processing services and JVD semiconductor fabrication equipment to the power IC manufacturing industry.