SBIR-STTR Award

Direct to Phase II

The High Integrity, Performant, Efficient Realization of a SPAceborne Cryptographic Engine (HIPERSPACE) project focuses on developing a new, very high-performance, high-assurance, NSA-certifiable cryptographic module for space use. The cryptographic prototype product we will create in this Direct-to-Phase II project leverages existing modules and technologies developed by Galois for the NSA and DARPA on previous (non-space) projects, and the deployment platform prototype product we will demonstrate is based upon Innoflight's platform that has been developed for the SDA Tranche 0 program. We intend to demonstrate an AES256-GCM core on Innoflight's ECU-400 platform to demonstrate compatibility with that feature-rich platform, as well as in a COTS Xilinx VCU-129 FPGA development board to demonstrate maximized throughput and minimized latency that exceed SDA requirements. We will also perform a full trade study for an ASIC implementation, as we do not believe an FPGA-based platform will ever meet the SDA's SWaP and performance requirements, and document the benefits of a transition to an ASIC-based solution. Finally, we intend to develop certification materials that will exceed the documentation and evidence demands of the NSA, leveraging cryptographic assurance technologies we have developed for NSA-R2.