SBIR-STTR Award

For this project, we will research novel data-splitting techniques that can be used on COTS hardware to achieve similar effects as a specialized security processor, without relying upon expensive cryptographic operations. This is achieved through the technique of data splitting, and the use of k copies of the same moderately secure COTS hardware (where k is at least 2, and can be increased to increase the resulting security). If the probability of compromise of the data in the COTS hardware is p, then the probability of compromise of the proposed system is p^k because it is now necessary to completely compromise every one of the k copies to obtain the secret encryption keys or otherwise compromise the secret data.

Keywords:
ANTI-TAMPER (AT), SOFTWARE PROTECTION, ENCRYPTION, DATA SPLITTING, SECURITY PROCESSOR

This Phase II proposal extends the technique developed during Phase I for protecting CPI into a commercially viable and generally applicable source-to-source transformation engine. In addition, we expand the Phase I approach to support high-performance secure computation through careful division of tasks, between a slower secured processor, and multiple high-performance general-purpose COTS processors, through the process of secure outsourcing.

Keywords:
Anti-Tamper (At), Software Protection, Encryption, Data Splitting, Security Processor, Cpi, High Performance