SBIR-STTR Award

Accord proposes a pioneering and innovative code-to-machine execution technology that preserves the encryption of executable instructions and data throughout all aspects of the execution cycle. At no time are instruction words or data values unencrypted. Crypto-reduced-instruction-processor-trusted-computers (CRIPTC) are not dependent upon reconfiguration or on machine uniqueness. CRIPTC memory and support chips are conventional. A CRIPTC machine has no standard functional units; each unit is synthesized by a crypto-synthesis compiler code builder combining aspects of cryptographic, very-long-instruction-word RISC compilers, hardware netlist synthesizers and chip place & route. The resulting CRIPTC instruction words form encrypted higher-level functional units. A 32-bit word has a key search space significantly greater than a 256-bit AES encryption. CRIPTC is a secure computer ideally suited to protecting critical technology in embedded real time or complex command and control processing. CRIPTC-based secure processing can be distributed outside secure sites, and applied within units which are subject to enemy capture. Accord will demonstrate a SystemC reference design that simulates bit-and-clock-accurate execution of the "never decrypted" CRIPTC instruction stream.

Keywords:
ANTI-TAMPER, SECURE PROCESSOR, ENCRYPTED EXECUTION, NON-DECRYPTED EXECUTION, INTERMEDIATE LANGUAGE SYNTHESIS,CRITICAL PROGRAM INFORMATION PROTECTION, SECURE WITHOUT INTRUSION

The CRIPTC Secure Processor executes encrypted code directly – the code and data are never decrypted, never existing as plaintext once within the system, including the memory, cache, and CPU. A would-be attacker is never given the opportunity to probe to capture the unencrypted code. CRIPTC revolutionizes protection of military critical technology and commercial intellectual property by enabling secure operations in situations where computational resources could be captured for reverse-engineering. CRIPTC technology enables a significantly reduced footprint (size, weight, heat generated and power consumed) by reducing tamper-resistance engineering and measures for reaching similar levels of software protection. In addition, CRIPTC is a new form of parallel processing, using concurrent execution to compensate for execution speed loss. Based on an embedded military and crypto benchmark the present 8-instruction by 8-bit prototype will be expanded to 16 by 16 and optimized in for software protection, execution speed, security, footprint and quality of service. An encoding compiler, based on standard GCC and MS Visual Studio programming environments, enables programming in high level languages. The intellectual property developed will be a microcontroller product and also used for a 32 x 32 ASIC preliminary design.

Keywords:
“secure Processor”, “direct Execution”, “concurrent Array Processor”, “software Protection”, “reduced Tamper Impact”, “reduced Tamper Footprint”, “red