SBIR-STTR Award

An automated programming tool for FPGA based reconfigurable systems
Award last edited on: 3/31/2003

Sponsored Program
SBIR
Awarding Agency
NSF
Total Award Amount
$65,000
Award Phase
1
Solicitation Topic Code
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Principal Investigator
David E Van den Bout

Company Information

X Engineering Software Services Corporation

2608 Sweetgun Drive
Apex, NC 27502
   (919) 387-1302
   N/A
   N/A
Location: Single
Congr. District: 02
County: Wake

Phase I

Contract Number: ----------
Start Date: ----    Completed: ----
Phase I year
1993
Phase I Amount
$65,000
Field programmable gate arrays (FPGAs) and field programmable interconnect devices (FPIDs) have the ability to integrate thousands of logic gates on a small board in which the interconnections can be completely rearranged within milliseconds without manual effort. Using FPGAs and FPIDs, it is now possible to construct a single board for a PC that can act as a FAX, ISDN interface, LAN interface, video compressor, coprocessor, or any other function that can be built using logic gates. A major obstacle to using a practical reconfigurable system is the lack of software tools to aid in designing applications to run on such systems.This research will examine the feasibility of building a tool for mapping logic designs to arbitrary reconfigurable architectures. This software tool will use new techniques from statistical mechanics and neural networks to automate the search for good solutions. Flexibility will be built in so it can be used with a wide variety of FPGAs, FPIDs, and interconnection arrangements. Such a tool increases the number of applications available for reconfigurable systems, which increases the number of such systems sold.Commercial Applications:The software tool would be of interest to: (1) FPGA and FPID vendors looking to open new markets for their chips; (2) existing design tool companies trying to support FPGAbased system design; and (3) new companies who are capitalizing on the new computing paradigm enabled by inexpensive reprogrammable logic chips.

Phase II

Contract Number: ----------
Start Date: ----    Completed: ----
Phase II year
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Phase II Amount
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