Ray tracing has long been recognized for its quality and flexibility in visualizing three dimensional data. To date, the single factor which has been limited the algorithm's use is its computational complexity. In an effort to overcome this problem an application specific parallel computer is proposed. This architecture is based upon a ray partitioning approach, in contrast to previous spatial partitioning approahces. It employs a multitude of processing elements, each with access to a global shared memory. To reduce the bandwidth requirements between individual processors and this shared memory the need for an efficient private cache arises. We suggest that the design of a cache specialized for accessing ray tracer databases is the single most important factor in the practical realization of the ray partitioning approach. The objective of this research is to determine the ray allocation scheme, the internal database structure, and the appropriate cache parameters which provide hit rates high enough to support the number of processors required for real-time ray tracing performance. Special attention will also be paid to load balancing and practical VLSI implementation.
