SBIR-STTR Award

Advanced Radiation Hardened Data Converter For Navy Strategic Applications
Award last edited on: 6/24/2014

Sponsored Program
SBIR
Awarding Agency
DOD : Navy
Total Award Amount
$79,293
Award Phase
1
Solicitation Topic Code
N132-145
Principal Investigator
Glenn Hess

Company Information

AET Inc (AKA: Advanced Engineering Technology)

1900 South Harbor City Boulevard Suite 225
Melbourne, FL 32901
   (321) 727-0328
   tjs@aet-usa.com
   www.aet-usa.com
Location: Single
Congr. District: 08
County: Brevard

Phase I

Contract Number: N68335-14-C-0114
Start Date: 2/12/2014    Completed: 8/15/2014
Phase I year
2014
Phase I Amount
$79,293
In this program, AET will perform research and development with the objective of developing an advanced radiation hardened data converter architecture for application in US Navy strategic programs. This advanced radiation hardened data converter will have high resolution and a high signal to noise ratio. Several architectures will be studied and the trade-offs between high resolution and bandwidth with higher precision available for lower bandwidth will be investigated. As with all strategic hardened electronics, there is an objective to reduce the size, weight, and power in the advanced radiation hardened data converter. During Phase I, the effectiveness of the proposed architecture will be demonstrated via simulation after an initial design is completed. In the Option program, AET will complete the design and layout of the data converter and deliver a GDSII file to the Navy. Then in Phase II, AET will complete the fabrication and test of the data converter and deliver samples to the Navy. AET is uniquely qualified to perform this work because of the level of experience that all of its engineers and consultants have in the design and development of radiation hardened analog integrated circuits with emphasis on modern CMOS technologies.

Keywords:
Analog To Digital Converter, Analog To Digital Converter, Sigma Delta, Integrated Circuit Design, , Digital To Analog Converter, Microelectronics, Radiation-Hardened-By-Design

Phase II

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Start Date: 00/00/00    Completed: 00/00/00
Phase II year
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