Our initial, practical and potentially commercial approach, based upon years of basic and applied research in chaotic computation, was developed in Phase I of our project. Following upon phase I of the STTR project we propose, in Phase II, to engineer, synthesize, and exploit the rich, intrinsic dynamics of nonlinear and chaotic circuits and systems to implement reconfigurable, secure and noise resistant computational hardware approaches for nonlinear and chaos based computations. Specifically, we will focus on designing, fabricating and testing a chaos base computer architectures consisting of robust individual and arrays of chaos based logic and computational elements which we will then evaluate and test to investigate the advantages of the new fabricated computational elements over currently available hardware. In phase I, we introduced and studied the potential advantages of the chaos based computing systems, namely reconfigurability, robustness to noise, secure logic functions, and adaptability.
Benefit: The proposed chaos computing system will be highly reconfigurable, intrinsically secure, and adjustably robust to different noise levels. As a result, this effort can provide the U.S. Navy with more flexible, more versatile, more secure, and more robust computer systems that can operate in a variety of conventional and difficult conditions. The functionality, security, and robustness levels of the computer can be easily changed and adjusted based on the momentary, permanent, temporal or spatial needs of the mission in which the chaos based computers have been deployed.
Keywords: chaos, secure electronics, Chaotic Computing, configurable, morphable, ASIC
