SBIR-STTR Award

Embedded control networks based on the ANSI 709.1 open protocol specification will be able to leverage the rapid growth in microprocessor performance with the addition of a driver chip that handles the physical layer details. A programmable device FPGA or CPLD with a generic high speed interface to a microprocessor together with the upper layers of the protocol stack will allow virtually any platform to support the ANSI 709.1 protocol. This project intends to capitalize on ASI's unique expertise in the ANSI 709.1 protocol to design a cost effective solution. Enables high performance ANSI 709.1 protocol based networks for more capable and surviveable shipboard networks. Fosters interoperable multiplatform implementations that maximize cost effectiveness and leverage technology innovations. Commercial applications include shipboard, building, vehicle, and factory automation. Mission critical surviveable systems. Component level intelligent distributed control systems and supervisory control systems.

A network interface chip (NIC) that implements appropriate portions of the lower 2 layers of the ANSI 709.1 protocol (LonTalk) has been successfully designed and tested on a programmable logic device.This NIC has been successfully interfaced to a NetSilicon 32 bit ARM processor running appropriate portions of the upper layers of the 709.1 protocol. A feasibility demonstration was conducted successfully. Three versions of the NIC with increasing levels of capability are proposed for further development and commercialization. This is a key enabling technology for advanced higher performance non- Neuron implementations of the ANSI 709.1 protocol.

Keywords:
Ansi 709.1 Protocol, Automation, Component Level Networks, Routers And Gateways, Lontalk, Control Networks, Survivable Networks, High Performan