SBIR-STTR Award

Transistorless Random Access Memory: a High Density and High Performance Replacement for SRAM's and DRAM's
Award last edited on: 3/29/2017

Sponsored Program
SBIR
Awarding Agency
DOD : Navy
Total Award Amount
$70,000
Award Phase
1
Solicitation Topic Code
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Principal Investigator
Michael J Sullivan

Company Information

Mamot

#902
Santa Clara, CA 95050
   (408) 248-1989
   N/A
   N/A
Location: Single
Congr. District: 17
County: Santa Clara

Phase I

Contract Number: No-Agency-Code
Start Date: 00/00/00    Completed: 00/00/00
Phase I year
1996
Phase I Amount
$70,000
MAMOT proposes to develop an electronic memory architecture capable of DRAM densities and SRAM speed. Each bit will be composed of a single nonlinear device, the Tunnel Switch Diode (TSD), which can retain binary information in the form of a stabel high or low current state. The main goals of the Phase I effort will be to eplore the possible operating parameters of the discrete TSD device, to investigate the possible radiation hardness of the device and to construct a working 16 bit demonstration unit.

Phase II

Contract Number: ----------
Start Date: 00/00/00    Completed: 00/00/00
Phase II year
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Phase II Amount
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