SBIR-STTR Award

Radiation-Hardened Latch-Up Monitor IC
Award last edited on: 1/28/22

Sponsored Program
SBIR
Awarding Agency
NASA : GSFC
Total Award Amount
$123,446
Award Phase
1
Solicitation Topic Code
Z8.03
Principal Investigator
Patrice Parris

Company Information

Vorago Technologies (AKA: Silicon Space Technology~Silicon Space Technology Corporation)

501 South Mopac Expressway Suite 350
Austin, TX 78746
   (512) 633-7992
   info@voragotech.com
   www.voragotech.com
Location: Single
Congr. District: 25
County: Travis

Phase I

Contract Number: 80NSSC19C0604
Start Date: 8/19/19    Completed: 2/18/20
Phase I year
2019
Phase I Amount
$123,446
Designers of electronic circuits that are used in radiation environments are concerned about ICs latching-up due to particle strikes. If a CMOS Integrated Circuit (IC) latches-up, it can often be recovered if it is reset quickly. To protect space electronic circuits from latch-up problems, a radiation-hardened Latch-up Monitor IC is required to determine when any IC on the Printed Circuit Board (PCB) latches-up and to reset that IC. There is an extremely limited range of solutions available to solve the latch-up problem today. We found only one radiation-tolerant latch-up current limiter device available from 3DPlus that is in a 15mm x 15mm x 12mm cube-like package and has a limited specification. It can monitor only four channels. There are also commercial current-limiting power distribution switches that are themselves susceptible to latching-up. An example of the latter is the Micrel MIC20XX that has been used in low-cost CubeSats. VORAGO Technologies propose to develop a radiation-hardened latch-up monitor IC. VORAGO Technologies has developed Intellectual Property (IP) blocks for an 8-channel analog-to-digital converter and a SPI interface that can be used as a base to design a radiation-hardened latch-up monitor IC. The device will be hardened using VORAGO’s HARDSIL® technology. We propose to implement this device in a 48 pin QFP package and will have the following characteristics A single chip solution that can detect latch-up in up to eight separate ICs Programmable trigger levels can be set for each of the ICs that are to be protected from latch-up Eight independent alert outputs that can be connected to the RESET inputs of the monitored ICs Small package footprint Low power consumption Under-voltage and over-voltage protection on-chip Integrated temperature sensor with programmable automatic IC shutdown for over-temperature and over-temperature output Potential NASA Applications (Limit 1500 characters, approximately 150 words) This proposal addresses NASA’s requirement for state-of-the-art IC solutions that are cost-effective enough to be used in small spacecraft with a limited budget but with radiation performance that is suitable for longer missions and beyond Low Earth Orbit (LEO). Today NASA uses some COTS-based solutions that have required functionality but there is no radiation hardened capability. An example would be Graphic Processor Units. These devices require robust latch-up monitoring and protection. The proposed IC offers this solution to NASA. Potential Non-NASA Applications (Limit 1500 characters, approximately 150 words) Commercial aerospace companies have the same problem as NASA. Sometimes they have no option but to use COTS devices that are susceptible to space radiation effects and need to protect them. As well as being suitable for small spacecraft longer missions and beyond Low Earth Orbit (LEO), the proposed device will be suitable for use in electronics exposed to GEO, Cislunar and deep space missi

Phase II

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Start Date: 00/00/00    Completed: 00/00/00
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