SBIR-STTR Award

Today, memory and payload processing systems for space applications are typically designed for a specific application for a specific mission. Many of these systems do not employ a commercial standard which adversely affects the development costs, risks, and schedule while minimizing effective reuse of capabilities. Traditional commercial standards such as PCI are limited in bandwidth and reliability and do not meet the needs of advanced space payloads. New standards, like VPX, do show promise. VPX supports module to module datarates of 10 Gbps. VPX supports multiple switch architecture, so redundancy is supported. With newer large capacity memory components, a high capacity modular architecture is achievable which opens the door for adoption of a commercial standard for space payload and memory systems.

While VPX shows promise as an open standard COTS computing and memory platform, there are several challenges that must be overcome to migrate the technology for a space application. For the Phase I SBIR, SEAKR investigated the 3u VPX architecture for the space environment for advanced memory and processing systems. The SBIR investigation focused on researching innovative switch fabric architectures, identifying and qualifying the building blocks for a space qualified VPX system, and addressed some of the challenges associated with VPX flash memory modules. The areas of innovation that have been addressed are outlined below:•Research and evaluate the basic building blocks required for a high speed switch VPX architecture•Explore advanced EDAC and innovative wear leveling techniques for commercially upscreened flash memory for space applications•Evaluate different techniques for very high speed flash memory access ratesThe Phase II SBIR will build on the Phase I study to produce a deliverable engineering model of a 3U VPX flash memory module.