SBIR-STTR Award

A novel process for advanced electronic packaging using COS hermetic coatings
Award last edited on: 3/8/02

Sponsored Program
SBIR
Awarding Agency
NASA : JPL
Total Award Amount
$661,369
Award Phase
2
Solicitation Topic Code
-----

Principal Investigator
Stanley M Stuhlbarg

Company Information

Engineering Technologies Associates

23015 Del Lago Drive Suite D2-133
Laguna Hills, CA 92653
   (714) 721-1445
   N/A
   N/A
Location: Single
Congr. District: 45
County: Orange

Phase I

Contract Number: ----------
Start Date: 00/00/00    Completed: 00/00/00
Phase I year
1993
Phase I Amount
$69,496
The proposed innovation is to develop thin inorganic barrier coatings to protect bare chip-on-substrate (COS) multichip modules in lieu of normally used heavy and bulky ceramic/metal cavity packages. Inorganic coatings will be deposited over assembled microcircuits precoated with stress-free, high-purity polymers, sealing them from external moisture and internal outgassing. Previous work involved plastic encapsulation alone or inorganic coatings followed by plastic encapsulation. These approaches suffer from either non-hermeticity or exposure of the assembled circuit to high deposition temperatures. Reversing the sequence obviates these problems. This project will analyze and select compatible inorganic and organic coatings to reliably protect COS microelectronics from extreme terrestrial and space environments. Based on Phase I, experimental validation of the approach will be planned for Phase II. A 6-month effort consisting of assessment, evaluation and selection of a COS packaging approach for multichip modules and preliminary experimental studies are proposed. This technology will provide NASA and the commercial community with a weight/volume reduction of 50-80% for each module-important in achieving NASA's goal for the next generation of microspacecraft. There is also a potential reliability improvement (interconnections will be reduced by 50%) and cost reduction (eliminates large high-I/O count cavity packages).Potential commercial applications include both data processing and telecommunications. Transportation (high-temperature automotive), medical applications, and food packaging also constitute large segments. Reduced-weight multichip modules will be used extensively in microspacecraft of the future. The advent of low cost multichip modules will result in high usage of these products in advanced computers.Inorganic Coatings Chip-On-Substrate (COS) Soxhlet Cleaning Multichip Module Microspacecraft Polymer Electlonic PackagingPhase 2 conversion

Phase II

Contract Number: ----------
Start Date: 00/00/00    Completed: 00/00/00
Phase II year
1994
Phase II Amount
$591,873
___(NOTE: Note: no official Abstract exists of this Phase II projects. Abstract is modified by idi from relevant Phase I data. The specific Phase II work statement and objectives may differ)___ The proposed innovation is to develop thin inorganic barrier coatings to protect bare chip-on-substrate (COS) multichip modules in lieu of normally used heavy and bulky ceramic/metal cavity packages. Inorganic coatings will be deposited over assembled microcircuits precoated with stress-free, high-purity polymers, sealing them from external moisture and internal outgassing. Previous work involved plastic encapsulation alone or inorganic coatings followed by plastic encapsulation. These approaches suffer from either non-hermeticity or exposure of the assembled circuit to high deposition temperatures. Reversing the sequence obviates these problems. This project will analyze and select compatible inorganic and organic coatings to reliably protect COS microelectronics from extreme terrestrial and space environments. Based on Phase I, experimental validation of the approach will be planned for Phase II. A 6-month effort consisting of assessment, evaluation and selection of a COS packaging approach for multichip modules and preliminary experimental studies are proposed. This technology will provide NASA and the commercial community with a weight/volume reduction of 50-80% for each module-important in achieving NASA's goal for the next generation of microspacecraft. There is also a potential reliability improvement (interconnections will be reduced by 50%) and cost reduction (eliminates large high-I/O count cavity packages).Potential commercial applications include both data processing and telecommunications. Transportation (high-temperature automotive), medical applications, and food packaging also constitute large segments. Reduced-weight multichip modules will be used extensively in microspacecraft of the future. The advent of low cost multichip modules will result in high usage of these products in advanced computers.Inorganic Coatings Chip-On-Substrate (COS) Soxhlet Cleaning Multichip Module Microspacecraft Polymer Electlonic PackagingPhase 2 conversion