General purpose processor Arithmetic Logic Units (ALUs) typically implement large micro-coded instruction sets to provide system flexibility, with the ultimate goal of supporting a wide base of applications. The large number of instructions results in a complex, relatively slow chip architecture. In effect, by basing their systems on general purpose ALUs, computer manufacturers trade-off speed of operations in favor of flexibility. However, there exist many applications for which flexibility is not required, but for which speed is the main goal. RISC-based systems aim for this market niche. This proposal addresses the development of ASP, the Accelerated String Processor. ASP utilizes a Reduced Instruction Set Computer (RISC) architecture to provide processing of character strings at rates in excess of 2,000 MCOPS (million character operations per second).
