SBIR-STTR Award

Advanced wideband, large, multimode distributed phase array radars require significantly improved T/R modules. Q-DOT proposes a staged X-band receiver block (XRB) chip development, beginning with the key analog to digital converter (ADC). Combined with key RF front end cells and integrated as a single-chip X-band receiver, the proposed X-band receiver block offers 10 to 20 dB dynamic range improvement and 2 - 4 times the bandwidth of existing digital receivers for a fraction of their size, weight, and power. High integration allows the XRB to be moved into the T/R module, with at most a single down conversion from X-band, which will ultimately be on-chip. The proposed SiGe BiCMOS technology enables integration and performance well beyond current T/R modules. The baseline X-band receiver block IC architecture will be defined during Phase I, and key ADC parameters specified. Key circuits will be designed and simulated to assess and project the ADC's performance. During Phase II, prototype ADCs, and perhaps additional XRB cells, will be designed, integrated, fabricated, and tested. System insertion will occur during Phase III when advanced T/R modules for large-aperture systems are developed

Advanced wideband, large, multimode distributed phase array radars require T/R modules which are much smaller and lower in power than present components. Q-DOT proposes a staged X-band receiver block (XRB) development, beginning with the key analog to digital converter (ADC) and supporting circuits (T/H, demux). The proposed ADC directly samples the X-band, eliminating intermediate frequency (IF) stages. Combined with key RF front end cells and integrated as a chip-scale package/module (and ultimately as a single chip), the proposed XRB offers 10 to 20 dB dynamic range improvement and 2 – 4 times the bandwidth of existing digital receivers for a fraction of their size, weight, and power. The proposed SiGe BiCMOS technology enables integration and performance well beyond current T/R components, allowing the XRB to be moved into the T/R element for RF-to-bits capability. The XRB’s baseline architecture was defined during Phase I, and key parameters specified. Key circuits were preliminarily designed and simulated to assess and project the ADC’s performance. During Phase II, prototype XRB’s will be designed, fabricated, and tested. System insertion will occur during Phase III when advanced T/R modules for large-aperture systems such as next-generation RST are developed.

Keywords:
X-Band, Adc, T/R, Radar, Sige, Bicmos, Aperture, Distributed Array