This Small Business Innovation Research Phase I project demonstrates a very high-resolution Analog-to-Digital Converter with Adaptive Parallel Combining (called Stacked ADC) which uses a parallel stack of high-speed, high-resolution analog-to-digital converters (ADCs) with adaptive signal combining to dramatically improve resolution (both Signal-to-Noise Ratio (SNR) and Spurious Free Dynamic Range (SFDR) ) while maintaining very high sample rate (wide bandwidth). Proprietary adaptive processing is used to optimally combine the parallel ADC outputs to maximize the SNR and SFDR. Proprietary digital FIR filtering is used to insure the parallel array of ADCs are extremely well-matched in gain and phase; when the parallel ADC signals are combined, these gain and phase mismatches would otherwise introduce errors in the ADC that significantly limit the dynamic range of the system. The Stacked ADC architecture will always exceed state-of-the-art because it can easily be upgraded as new, more powerful ADC products become available. For example, this technology is currently capable of using four 12-bit, 210 MHz sample rate ADCs in parallel to improve the SNR and SFDR by 26 dB over a wide range of input power levels and while maintaining the full 210 MHz sample rate. A stack of parallel ADCs and the efficient digital signal processing can be packaged in a compact, low-power multi-chip module (MCM) for use in the next generation of high-performance radar systems and RF receivers. The architecture is also applicable to dramatically improving the SNR and SFDR of digital-to-analog conversion for radar and RF transmission systems. Because the Stacked ADC approach maximizes the SNR and SFDR over a wide range of input signal levels, it significantly reduces (or eliminates) the need for additional automatic gain control (AGC) with feedback circuitry and variable gain amplifiers. V-Corp is currently working with Analog Devices, Inc. and their multi-chip products division on developing and packaging various high-performance multi-converter technologies, including the Stacked ADC. During Phase I, V-Corp will demonstrate the architecture via hardware breadboarding and using proprietary digital signal processing routines to improve the SNR and SFDR of the converter system. A real-time hardware implementation of the digital signal processing in the architecture will be designed in a Phase I Option. During Phase II, a compact real-time implementation of the Stacked ADC system will be implemented and integrated in a target system (e.g., advanced digital radar). Anticipated Benefits/Commercial Applications: The Stacked ADC approach overcomes the critical A/D conversion bottleneck which limits performance of state-of-the-art radio frequency transceiver systems. Virtually any high-performance modern electronic system will benefit from the technique. Significant applications include enhancement of radar systems, wideband universal RF transceivers, specialized test equipment, and medical imaging systems.
Keywords: high-resolution, SNR, analog-to-digital conversion, radar, high-speed, SFDR, RF communications
