The speed of image identification and scene analysis in advanced surveillance systems designed to detect, track, and classify multiple targets is greatly limited by the I/O bandwidth of the processor employed. However, a fast processor is often utilized inefficiently due to an algorithm which needs frequent memory access. Algorithms need to be developed with a minimal number of references to the input images that can be used for various purposes such as image filtering, segmentation, and feature extraction, and that can be implemented by a unique systolic architecture. A new class of image processing algorithms for target classification and related applications are being developed. These faster-scan algorithms are expected to minimize memory access time which is a principal bottleneck in image processing. Connectivity-mapping and chain-code mapping algorithms are being implemented on a systolic array to achieve the speed-up needed for real-time processing. These algorithms are anticipated to provide the primitive operations needed for image filtering segmentation, edge detection, skeleton extraction, and feature extraction. Extensions of the basic algorithms to multiple grey level images, multiple look-angles, and recursive updating are also being considered.
