Aicom plans to develop a low cost, high quality speech synthesizer chip which may be used in the visually impaired market, in the educational market, and in the commercial market. In this phase, we plan to study the architecture of the chip, the complexity of the circuit, the possible die size, the power consumption, and the total cost of producing the chip. In addition, we plan on running a computer simulation for the architecture of the chip.Key Words: Speech synthesizer low bit rate, IC, low cost, quality, wide market.
Anticipated Results:Phase I: We will define the architecture, total cost, and feasibility of building the chip. This will provide a firm foundation for Phase II. Phase II: This phase will result in the actual development of the chip. Besides quality, the key goal we are aiming for from this chip is low bit rate. The bit rate of a speech synthesizer defines the amount of memory it requires to speak one second of speech. Thus, the lower the bit rate, the lower the memory requirement, and the lower the memory requirement, the less expensive the end product, into which this chip will be implemented, will be. Currently, there is no low cost, high quality, low bit rate synthesizer available in the markets With the development of this new chip, we can penetrate almost any market requiring synthesized speech.Topic 1.B: Development or Adaptation of Devices, Mechanisms, or Techniques, for Individuals with Disabilities; Individuals with Visual Disabilities.
