SiC power semiconductors have the capability of greatly outperforming Si-based power devices. Smaller switching and on-state losses coupled with higher voltage blocking capability, and especially its high operating temperature make SiC the ideal semiconductor for high performance, high power density power modules. One major factor limiting the switching speed, and thus power loss of these devices, is the parasitic inductance between the gate driver and the switch. The inductance will limit the rise time of the gate current which will limit how fast the gate voltage can increase. This inductance can be minimized by placing the gate driver very close to the power device; however, this increases the ambient temperature of the gate driver up to the maximum junction temperature of the power switch. In addition to this ambient temperature, the gate driver will produce its own losses, increasing the gate driver junction temperature even further. Thus, the full power density advantages of SiC hinge on the successful and reliable realization of this technology at very high temperatures ( & gt; 300 C). High temperature operation introduces a set of technological barriers. APEI, Inc. researchers have developed solutions to some of these barriers and have proven the feasibility of SiC power electronics operating at high temperature. A void exists, however, in the full realization of these highly efficient power modules. Currently there are no high temperature integral solutions to meet the particular requirements of driving a SiC field-effect transistor (FET) (e.g., high switching frequency, high voltage transient immunity, high temperature). Approaches with discrete components are large with reduced reliability and added parasitics. The ideal solution is a compact, highly integrated, and flexible gate driver that could be rapidly implemented with its associated switch. In this Phase I proposal, APEI, Inc. will continue development of its patented high temperature gate driver technology, enabling the next generation of high-efficiency, high power density converters. At the conclusion of Phase I, APEI, Inc. will design, fabricate, and demonstrate a high temperature (300 C) gate driver utilizing discrete SiC circuitry while concurrently developing high temperature packaging techniques to enable reliable operation of the drivers over an extended period of time. These designs will then be transitioned directly into an all-SiC integrated circuit (IC) process in Phase II.
