Defense Electronics Corporation (DEC) will develop and demonstrate innovative closed-loop control mechanisms for high quality factor Radio Frequency filters or banks of filters for use in frequency-agile radio front-ends. These mechanisms include a hybrid filter control technique using real-time filter response feedback, applications specific integrated circuit (ASIC) or field programmable gate array (FPGA) processing element, and will include a low power design approach and on-chip built in self test (BIST), built in diagnostics (BID), built in current sensing (BICS), and chip level integrated recovery (CLIR) capabilities for robust reliable designs. The research conducted during Phase I is designed to flow seamlessly into a Phase II follow-on effort, during which we will finalize formidable design solutions, layout efficient physical designs, and submit them for fabrication at a 45nm/65nm trusted foundry. This will provide a path to test and characterize actual physical prototypes in silicon in representative sub-systems. The methods and technologies investigated during Phase I and II will include the efficient use of electronic design automation tools, technology CAD tools, mixed-mode and level simulation systems, and process design kits (PDK). Indeed, we expect to commercialize this technology with ITT-Exelis as a prime customer during Phase III.
Keywords: Adaptive Radio Frequency Technology, Bandwidth, Center Frequency, Closed-Loop Control, Communications, Complementary Metal Oxide Semiconductor (Cmos) Compatible Fabrication P
