Sierra Monolithics, Inc. (SMI) proposes to develop a 16-bit, 2 GS/s A/D Converter using a novel Delta-Sigma architecture to achieve the bit resolution and incorporating IBM's Silicon Germanium (SiGe) BiCMOS process for the requisite speed. Commercial A/D converters on silicon or GaAs do not simultaneously provide GHz sampling rate and high 16-bit resolution. In order to satisfy both of these performance criteria for a 100 MHz input signal bandwidth, the device technology has to be fast enough to reduce the sampling aperture jitter down to less than 50 fsec and the digitizing error to 15 ?V. SMI proposes an A/D converter approach that will meet these requirements. The approach uses IBM's SiGe HBT technology for low jitter (5 fsec), high sample rate (2 GS/s) and a unique Delta-Sigma architecture for the digitizing accuracy. The novel Delta-Sigma architecture uses a second order noise shaping single loop, dynamic element matching for improved DAC accuracy, and linearity enhanced subtraction circuit with an embedded DAC to achieve 16-bit resolution. System design and device simulation for the A/D converter will be performed in Phase I while fabrication and test will be performed in Phase II.
