Existing techniques for non-destructive semiconductor dopant profiling are limited either in spatial resolution, sensitivity or accuracy. The object of this program is to thoroughly characterize the capabilities and limitations of scanning capacitance microscopy for true three-dimensional semiconductor dopant profiling with sub-micron spatial resolution. We aim to define design parameters and build prototype hardware for a commercial research instrument based on park scientific instruments' current range of scanning tunneling microscopes; this will enable more widespread evaluation of the technique by process engineers on their own processes, using debugged hardware that has already been optimized for the application. We propose to evaluate performance both on simple test structures as well as on typical production semiconductor devices and to compare results with alternative destructive and non-destructive measurement techniques as well as with theory. In this effort we plan to collaborate extensively with local process engineers, who will provide test samples. We will investigate how established capacitance feedback depth profiling techniques could be combined with the scanning capacitance microscope to further extend the technique. These Phase I activities would pave the way for a Phase II program to develop on-line automated instrumentation for semiconductor process control. Anticipated benefits/potential commercial applications - a) development of 3-dimensional dopant profiling with sub-micron resolution; b) availability of commercial research hardware for thorough characterization of the technique; c) potential use of the technique by the semiconductor industry to improve device and process performance and yield.Key words: dopant profiling, 3-dimensional, sub-micron resolution, non-destructive, semiconductor fabrication, process control
