SBIR-STTR Award

Adaptive Stochastic Content Addressable memory
Award last edited on: 3/10/02

Sponsored Program
SBIR
Awarding Agency
DOD : DARPA
Total Award Amount
$588,586
Award Phase
2
Solicitation Topic Code
SB861-007
Principal Investigator
Hendricus G Loos

Company Information

Laguna Research Laboratory

3015 Rainbow Glen
Fallbrook , CA 92028
   (619) 728-8767
   N/A
   N/A
Location: Single
Congr. District: 50
County: San Diego

Phase I

Contract Number: DAAH0186C0968
Start Date: 00/00/00    Completed: 00/00/00
Phase I year
1986
Phase I Amount
$64,295
It is proposed to explore the feasibility of adding adaptive and stochastic features to a content-addressable memory (cam) in such a manner that the device becomes capable of learning from instruction and experience. The algorithm of the adaptive stochastic content addressable memory (ASCAM) is the same as that of adaptive neural networks, viz., Iterative threshold matrix-binary vector multiplication, with adaption in the form of facilitation. The latter comes in two kinds: s-facilitation, which involves the increase of the magnitude of those matrix elements which have repeatedly contributed to output in the matrix-vector multiplication in the recent past. Facilitation involves the decrease of threshold of those components which have repeatedly had an output in the recent past. The cam stores a set of binary words; upon input of a word which has a small hamming distance to one of the stored words, the cam outputs this stored word within a few machine cycles. An optical implementation of the ASCAM is envisioned. The feasibility exploration will be conducted through computer calculations on a 64-bit ASCAM. For different facilitation and stochastic schemes, the learning ability of the ASCAM will be investigated.

Phase II

Contract Number: DAAH01-88-C-0889
Start Date: 00/00/00    Completed: 00/00/00
Phase II year
1988
Phase II Amount
$524,291
A new associative memory architecture has been conceived, which gives a large increase in memory capacity over the hopfield memory, and provides improved associative recall as well. Furthermore, the new memory solves the problem of overlearning in unsupervised adaptive operation. The new architecture may be described as a reflexive hetero-associative memory with orthonormal labels that are processed in a certain nonlinear manner. The operation involves signal flow in both directions, as in a resonator. In each iterative cycle, data are converted into labels, which then are turned back again into data. The phase II objective is the further development and analysis of this architecture, and the construction and testing of a rig such as to provide proof of concept, and the conduct of experiments to investigate a number of local adaptive mechanisms, as well as stochastic effects.