SBIR-STTR Award

Tightly Coupled Oscillator and GPS Receiver
Award last edited on: 9/17/2019

Sponsored Program
SBIR
Awarding Agency
DOD : Army
Total Award Amount
$637,800
Award Phase
2
Solicitation Topic Code
A17-051
Principal Investigator
Keith Thomas Loiselle

Company Information

Jackson Labs Technologies Inc

10080 Alta Drive Suite 110
Las Vegas, NV 89145
   (702) 233-1334
   info@jackson-labs.com
   www.jackson-labs.com
Location: Single
Congr. District: 03
County: Clark

Phase I

Contract Number: W56KGU-18-C-0010
Start Date: 00/00/00    Completed: 00/00/00
Phase I year
2018
Phase I Amount
$129,270
Legacy GPS receivers do not make use of the disciplined atomic oscillator flywheel output in GPS Disciplined Oscillator systems. The attached proposal shows how the disciplined oscillator signal can be used to improve GPS carrier and code tracking, mitigate multipath, jamming and spoofing, and to detect GPS receiver and satellite system anomalies. Using the disciplined oscillator as the frequency reference inside the GPS receiver itself results in better jamming and spoofing immunity, faster re-acquisition, direct-Y code acquisition after a cold-start, and complete removal of the 1PPS sawtooth. Multi-sensor fusion using a built-in Inertial Navigation Subsystem (INS) and the Chip Scale Atomic Clock (CSAC) is used to detect physical motion allowing detecting and mitigation of spoofing and multipath signals and the reduction of clock errors. The built-in INS also allows detecting if the unit is operating in a stationary position mode, which the proposed algorithm can then use to discipline the internal CSAC with as little as a single satellite in view, allowing operation under foliage and in urban canyons. A 3-cornered-hat approach is used in the proposed algorithm to detect and remove errors and abnormalities on any one of the three input signals (GPS, INS, CSAC).

Phase II

Contract Number: W56KGU-18-C-0010
Start Date: 00/00/00    Completed: 00/00/00
Phase II year
2019
Phase II Amount
$508,530
GPS Disciplined Oscillator (GPSDO) systems traditionally combine the 1PPS output from a GPS receiver and highly stable clock like a Chip Scale Atomic Clock (CSAC) to steer the local clock frequency to match the frequency and phase of the GPS-generated 1PPS.However, the GPS receiver does not take advantage of the stable Chip Scale Atomic Clock for improved GPS receiver resilience, improved position navigation and timing performance, and spoofing detection.This Phase II proposal shows how the disciplined oscillator clock can be used to improve GPS carrier and code tracking, mitigate multipath, jamming and spoofing and to detect GPS receiver and satellite system anomalies.With fixed position operation, using the CSAC oscillator as the GPS reference clock allows aiding the tracking loops, reducing the likelihood of tracking erroneous signals (i.e. benign interference or malicious spoofing).The same concept applies to mobile operation with a multi-sensor fusion of GPS receiver, CSAC oscillator and Inertial Navigation System (INS).The multi-sensor system can remove bad measurements and operate in INS / CSAC holdover during periods of jamming or detected spoofing.This Phase II proposal focuses on building a prototype single board system capable of implementing and testing/qualifying algorithms with tightly coupled GPS/CSAC/INS system.