SBIR-STTR Award

Radar on a Chip
Award last edited on: 7/8/2010

Sponsored Program
SBIR
Awarding Agency
DOD : Army
Total Award Amount
$799,928
Award Phase
2
Solicitation Topic Code
A07-180
Principal Investigator
J David Irwin

Company Information

Purewave Inc

1634 Presley Court
Auburn, AL 36830
   (334) 524-1118
   fosterdai@yahoo.com
   N/A
Location: Single
Congr. District: 03
County: Lee

Phase I

Contract Number: ----------
Start Date: ----    Completed: ----
Phase I year
2008
Phase I Amount
$69,928
This proposal presents an innovative low power and high performance transceiver (TR) microwave monolithic integrated circuit (MMIC) for 10GHz multifunction Radar-On-Chip (ROC) applications. The radar TR MMIC includes a low noise front end with low noise amplifier (LNA) and mixer. The TR MMIC is featured with a high speed and low power analog-to-digital converter (ADC), which allows digitizing the received signal at input frequency beyond 1GHz. The TR MMIC also includes an ultrahigh-speed low power direct digital synthesizer (DDS) with a clock frequency larger than 4.5 GHz. The high-speed DDS includes a sinusoidal weighted digital-to-analog converter (DAC) with 9-bit resolution to achieve better than -50dBc spectral purity. The DDS modulation waveform configurations include chirp, step frequency, FM, MSK, and PM. It uses a low-noise phase lock loop (PLL) to generate both the DDS clock and the local frequency at 9 GHz. The TR MMIC has a power amplifier (PA) with innovative bias boosting scheme to deliver larger than 100mW output at 10GHz with high power added efficiency (PAE). The proposed TR MMIC using commercially available SiGe technology can achieve low power consumption of less than 10W for X-band radar applications.

Keywords:
Mmic, Sige, Radar, Tr Module, Transceiver, Dds, Adc, Dac

Phase II

Contract Number: ----------
Start Date: ----    Completed: ----
Phase II year
2009
Phase II Amount
$730,000
This proposal presents an innovative low power and high performance transceiver (TR) microwave monolithic integrated circuit (MMIC) for a 15.7~17.7 GHz Ku-band (or 10~12 GHz X-band) Radar-On-Chip (ROC) applications. The radar TR MMIC utilizes phase-array architecture for improved directivity. The radar TR MMIC includes a low noise front-end with low noise amplifier (LNA) and mixer. The TR MMIC is featured with 12bit low-power analog-to-digital-converters (ADC) with programmable sample rate of 40~120MHz and input bandwidth 10~30MHz. The TR MMIC also includes a high-speed low-power direct-digital-synthesizer (DDS) with programmable clock frequency up to 2 GHz. The DDS further includes a 24-bit phase accumulator and a 10-bit sinusoidal-weighted digital-to-analog-converter (DAC) to achieve better than 50dBc spurious-free-dynamic-range (SFDR). The DDS also includes a chirp modulator to allow stretch procession that relaxes the input-bandwidth requirement for the ADCs. The TR MMIC uses a low-noise phase-locked-loop (PLL) to generate both the ADC/DDS clocks and the multi-phase local-oscillator (LO) signals for phase array transmission. The TR module has a power amplifier (PA) driver with innovative bias boosting scheme to drive off-chip PAs. The proposed SiGe TR MMIC can achieve low power consumption of less than 6W for Ku-band and X-band radar applications.

Keywords:
Mmic,Radar, Tr Module, Transceiver, Dds, Adc,Phase Array,Stretch Processing