SBIR-STTR Award

3D-IC proposes to develop design specifications for a 12 megapixel 1000 frame / second digital output imager. The proposed design will be based on using a monolithic substrate for the photosensor array that is engineered to achieve high quantum efficiency and good spectral response in visible light. The company proposes to investigate adaptation of its proprietary pixel-parallel processor core architecture to enable the required high bandwidth data read out in this Phase I study. It will also investigate requirements for the interface camera and propose a suitable camera system architecture. High speed photographic systems are used for many purposes, including ballistics testing, industrial inspection, security, law enforcement, and medical applications. Market research in the domain of high-end imaging applications shows that the demand for these products will exceed $200M/year by 2004 in unit sensor costs. Digital imaging techniques, will significantly improve the quality of high speed photography. They will allow faster, more automated analysis of the available information, and will eliminate the cost and time needed to process film.

R3 Logic, Incorporated proposes to develop a high-resolution, 12M-pixel 1000 frame / s imager to meet the Army's digital imaging needs for weapons test and evaluation. Through this program, R3 Logic will not only build and demonstrate a high-resolution imager, but will formulate a new methodology for commercially viable fabrication of large-format focal plane arrays. Large focal plane digital imaging systems are of significant importance to many military and civilian applications. We propose to build two prototype devices in the Phase II program, the first which will allow us to test circuit and pixel performance, and the second which will demonstrate the full resolution imager