SBIR-STTR Award

Microcomputer-Network Architecture for Range Instrumentation Applications
Award last edited on: 12/18/2014

Sponsored Program
SBIR
Awarding Agency
DOD : Army
Total Award Amount
$57,402
Award Phase
1
Solicitation Topic Code
A87-209
Principal Investigator
Yong M Cho

Company Information

Cho Inc

4004 Harrison Road
Beltsville, MD 20705
   (301) 937-9260
   N/A
   N/A
Location: Single
Congr. District: 05
County: Prince Georges

Phase I

Contract Number: N/A
Start Date: 00/00/00    Completed: 00/00/00
Phase I year
1987
Phase I Amount
$57,402
VLSI (very large scale integration) technology has been developed to the point where special purpose processors may be concatenated to form supercomputers with faster throughput rates than uni-processor machines. Cho, Inc. proposes to design and develop a multi-processor computer architecture for real-time digital filtering of multi-sensor tracking data. The architecture will be optimized for implementation of the decentralized square root information filter (SRIF). Phase I research will demonstrate feasibility of the decentralized SRIF as a means for solving the linear least squares estimation problem in decentralized form. Phase II research will focus upon development and testing of a prototype device.

Phase II

Contract Number: ----------
Start Date: 00/00/00    Completed: 00/00/00
Phase II year
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Phase II Amount
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