SBIR-STTR Award

The Design and Fabrication of Hybrid circuit power switches including drive and protection networks
Award last edited on: 9/18/02

Sponsored Program
SBIR
Awarding Agency
DOD : Army
Total Award Amount
$450,050
Award Phase
2
Solicitation Topic Code
A87-141
Principal Investigator
William H Dawes

Company Information

ICE Corporation

240 Levee Drive
Manhattan, KS 66502
   (785) 776-6423
   pat@ice-ks.com
   www.ice-ks.com
Location: Single
Congr. District: 01
County: Riley

Phase I

Contract Number: DAAK70-87-C-0032
Start Date: 00/00/00    Completed: 00/00/00
Phase I year
1987
Phase I Amount
$50,050
This proposal would encompass the design and fabrication of solid state power switches as hybrid circuits. The circuits would contain parallel output transistors, all required current drive stages, hightemperature and high-current protection. Temperatures are measured with screen printed or chip thermistors and current will be monitored as a voltage across a sense resistor or other method yet to be designed, such as hall-effect sensors. All components will be screen printed or surface mount devices, including the output transistors. Successful completion of this activity will result in the fabrication of a number of working circuits.

Phase II

Contract Number: 15168
Start Date: 00/00/00    Completed: 00/00/00
Phase II year
1989
Phase II Amount
$400,000
The ICE Corporation proposes to design and manufacture a family of power hybrid circuit dc switches, including optical-isolation, over-current and over-temperature protection and drive networks. The first step of phase ii will be to improve the switch designed and fabricated during phase i. This includes improvements in switching speeds, switching delays and reducing protection threshold variations with temperature and power supply voltage. The next step will be the design of a family of approximately five switches with a current capacity range of from 1 to 50 amperes, although exceeding 50 amperes will be investigated. An attemp to extend Phase i's 32 volt operating potential to 500 volts will be made. A major effort will be made to eliminate the current-sense resistor of phase i by using current-sensing fets. The optical-isolation, cmos and ttl compatibility of phase i will be maintained. Various harmetic packages will be investigated, including the to-204 (to-3) and to-213 (to-66). Conformance with mil-std-833b will be attempted to encourage later government purchases.