SBIR-STTR Award

Monolithic Integration of GeSn/Si APDs onto Silicon Read-out Integrated Circuits
Award last edited on: 10/18/22

Sponsored Program
STTR
Awarding Agency
DOD : AF
Total Award Amount
$799,315
Award Phase
2
Solicitation Topic Code
AF20C-TCSO1
Principal Investigator
Michael MacDougal

Company Information

Attollo Engineering LLC

160 Camino Ruiz
Camarillo, CA 93012
   (805) 384-8046
   info@attolloengineering.com
   www.attolloengineering.com

Research Institution

University of Wisconsin

Phase I

Contract Number: FA8649-21-P-0622
Start Date: 2/24/21    Completed: 5/24/21
Phase I year
2021
Phase I Amount
$49,626
Attollo proposes to develop a GeSn / Si APD intended for Geiger mode operation that can be monolithically integrated with Silicon CMOS wafers, and ultimately incorporated into low SWaP-C cameras.

Phase II

Contract Number: FA8649-22-P-0736
Start Date: 3/9/22    Completed: 6/8/23
Phase II year
2022
Phase II Amount
$749,689
Attollo proposes to develop GeSn/Si heterojunction APDs by employing semiconductor grafting techniques that was invented by our partner Prof. Zhenqiang (Jack) Ma at University of Wisconsin. The band offset between Ge0.9Sn0.1 and Si is about zero eV, allowing electrons to be collected in the avalanche Si region without any energy barrier, which is ideal for APD applications. Note that the proposers have checked 6 other types of possible material candidates with > 2µm absorption that can also be grafted with Si by Prof. Ma at UW-Madison, including Ga0.34In0.66As, In0.73As0.27P, Hg0.58Cd0.42Se, and others. All of these candidates have a negative band offset with Si, thus forming an electronic energy barrier for electrons to be collected by Si for multiplication.