SBIR-STTR Award

Coupled Oscillator based Information Processing in CMOS
Award last edited on: 9/22/2021

Sponsored Program
STTR
Awarding Agency
DOD : AF
Total Award Amount
$149,625
Award Phase
1
Solicitation Topic Code
AF20A-T003
Principal Investigator
Jeffrey Chou

Company Information

Sync Computing Corp

501 Massachusetts Avenue
Cambridge, MA 02139
   (617) 433-8759
   info@synccomputing.com
   www.synccomputing.com

Research Institution

Universities Space Research Association

Phase I

Contract Number: FA8750-20-P-1701
Start Date: 6/15/2020    Completed: 12/15/2020
Phase I year
2020
Phase I Amount
$149,625
Sync Computing has developed and experimentally demonstrated an analog electronic circuit architecture which can dramatically accelerate the computation of combinatorial optimization problems, solving in seconds or minutes what would otherwise take days or years, and doing so using microelectronics hardware which exists today. The circuit utilizes a network of coupled oscillators whose interconnection strengths represent a specific computational problem. When programmed, the natural dynamics of the oscillator system evolve to rapidly produce a high quality solution to the optimization problem. Due to the exploitation of the inherent physics of the electronic system, computational bottlenecks of traditional digital computing can be circumvented, and as a result solutions can be found dramatically faster than algorithmic approaches using traditional digital computer architectures. Initial projections of the coupled-oscillator system with only 300 oscillators show that it is capable of solving challenging computational problems 1000x faster than modern graphics processing units while consuming roughly 20x less power. Quantum computing has emerged with hopes to exploit the power of quantum mechanics to more efficiently find an optimal solution to intractable optimization problems. However, the most mature quantum computing platforms require extraordinary engineering advancements to build and maintain large-scale superconducting circuits which operate at temperatures close to absolute zero. The considerable hardware costs and fundamental theoretical challenges significantly limit its applicability for the Airforce in the next 20 years. The Sync Computing technology is dramatically simpler by relying on standard, room temperature, and massively scalable electronics. The founders of Sync Computing have recently demonstrated this phenomenon in a proof-of-principle experiment using electronic parts costing only $20. The use of conventional electronic hardware provides an enormous economic and scaling advantage, allowing for chip-scale integration using existing hardware and does not rely on quantum technologies. Our proposed investigation addresses the same computationally hard problems in optimization that are now subject of quantum annealing (QA) and quantum-approximate-optimization algorithms (QAOA), and complements quantum computing approaches. In particular, due to the striking similarities in the programming techniques used for the Sync computing system and QA/QAOA, we could address a decomposed partial problem in co-operation with a quantum processor, with clear benefits with respect to other known digital decomposition techniques. In this proposal, Sync Computing and the Research Institute for Advanced Computer Science of the Universities Space Research Association will team together to pursue the benchmarking and novel algorithm testing of the Sync Computing system.

Phase II

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Start Date: 00/00/00    Completed: 00/00/00
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