SBIR-STTR Award

Photonic Crystal Chip-scale Optical Networks
Award last edited on: 5/8/2007

Sponsored Program
STTR
Awarding Agency
DOD : AF
Total Award Amount
$848,732
Award Phase
2
Solicitation Topic Code
AF03T021
Principal Investigator
Robert Scarmozzino

Company Information

RSoft Inc (AKA: RSoft Design Group, Inc)

400 Executive Boulevard Suite 101
Ossining, NY 10562
   (914) 923-2164
   info@rsoftdesign.com
   www.rsoftdesign.com

Research Institution

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Phase I

Contract Number: ----------
Start Date: ----    Completed: ----
Phase I year
2004
Phase I Amount
$99,866
This proposal aims to spur the development of the next-generation of photonic crystal (PC) design tools. While current tools can model individual PC devices, they will prove insufficient to deal with the far-increased complexity of intregrated on-chip PC networks. There is a need for tools to improve both in their raw power and ability to handle very large problems robustly, but also to treat complex PC structures in a more intelligent and automated fashion. We propose to create several significant enhancements to RSoft’s current tool suite. We will implement a generic engine capable of driving optimization projects for all RSoft device tools. The current capabilities for parallel computing will be extended to support new features such as complex gain modeling for active devices and better exploit naturally-parallel problems. Most importantly, we will undertake the design of a new circuit-level tool to enable hierarchical modeling of very complex circuits. This tool will allow different components to be modeled with different numerical tools and to be connected at a high level using S-matrix representations to support feedback and bi-directionality.

Benefits:
The research and development effort in this proposal will create commercial design and simulation software for devices and system-on-chip base on photonic crystals. These softwares will provide efficient, accurate and vital numerical modeling of manufacturable/fabricated PBG devices and systems, thereby reducing design cycle and experiment costs and increasing success rates. The advantages of these softwares include flexible and powerful CAD interface, advanced and optimized algorithms and parallel and distributed computing capabilities. More importantly, the circuit level design tool, which will be developed in this proposal, will address the current design bottleneck for system-on-chip based on photonic crystals. All the above benefits will be critical for designers and researchers to develop commercially-worthy devices and systems based on photonic crystals. Abstract: Photonic crystal, photonic bandgap, nanophotonics, integration, waveguides,photonic circuit,laser,chip scale optical networks

Phase II

Contract Number: ----------
Start Date: ----    Completed: ----
Phase II year
2005
Phase II Amount
$748,866
Photonics research is increasingly focusing on integrated photonic chip platforms, built around photonic crystals, nanoscale devices and hybrid integration. Designing such complex devices requires ever more powerful multi-layered simulators. We propose to develop the next generation of photonic modeling tools based on a new graphical hierarchical circuit level software tool. This tool will balance speed and efficiency, by allowing the connection and interaction of different simulators, so that appropriate numerical methods can be applied to different parts of a circuit; field representations can be transformed between simulators; and models at different levels of sophistication from microscopic fields to coarse S-matrices may be connected. The work will also provide new algorithms and descriptions for modeling devices in exotic anistropic, nonlinear and dispersive materials. In particular, we target fast, accurate modeling of metallic nano-devices exhibiting plasmonic effects.

Keywords:
Photonic Chip, Photonic Crystals, Circuit Level Simulation, Hybrid Integration, Numerical Algorithms