SBIR-STTR Award

Rising increases in semiconductor capabilities have changed face of ASIC design. Designers recently demanding increased die densities are now concerned with how they can afford the NRE to design a complex ASIC. Gate counts have far outpaced design tool capabilities, measured in gates designed per engineer-day. Automated VHDL generation is a potentially promising field, but the approach has failed to produce code sufficiently efficient to allow significant use of mobile communications; this is especially true in battery-powered portable handset applications, where power and size are at a premium. With wireless applications representing an ever increasing number of new design starts, the rapid emergence of wireless and mobile communications make this an attractive area for EDA enhancements. COM-Solutions, Inc. proposes to approach this problem with a combined communication system design/EDA tool based on configurable modular VHDL building blocks (cores) for communications functions. Benefits are shortened design time, reduced probability of design errors, and better opportunities for optimization, all of which reduce cost. Our work plan includes a trial system design and an example VHDL core, synthesized and simulated. This will be suitable for integration into an existing tool, augmenting its current capabilities. We intend to leverage and compliment existing tools.

Keywords:
Wireless Communications Wireless Communications Asic Design Asic Design Vhdl Vhdl

Advances in semiconductor gate densities have far outpaced advances in design productivity. Incremental advances in tool efficiency are insufficient to bridge this gap. However, designing at a higher level of abstraction holds the potential to increase productivity by multiples, not fractions. Our Work Plan proposes to develop a library of wireless communications cores in VHDL, each embodying significant system-level experience and knowledge. We couple this with a high-level statistical simulation environment for design exploration and verification, because radio communication functions cannot be tested except in their whole-system context. This provides a powerful, rapid design and prototyping environment. Encapsulating design in modular building blocks increases the level of abstraction, and also permits a system to be re-used and customized. This is ideal for COTS procurement, allowing the military to leverage commercial volumes while still retaining the freedom to customize parts of the system. As systems migrate from boards to die, the basic building block will be the VHDL core, not the packaged IC, and we are positioned for leadership in this trend. Our Phase I has proven feasibility and shown high productivity. We address the key issues in a high-growth market, with critical importance in both military and commercial applications

Keywords:
Cad Vhdl Core Megacell Wireless Eda Tools Communication High-Level Synthesis