Affordable satellite communications support for tomorrows warfighter is of utmost importance. As a result, the payloads for military communication satellite are likely to grow in size, weight, and complexity with greater levels of power compensation. Therefore, the Air Force is interested in the exploration of more power efficient communications processing microelectronics with enhanced performance, while remaining within the space and weight (lift) limits of a Medium Launch Vehicle. Therefore, the Air Force is interested in the development of power efficient, reliable, high speed, Single Event Effect (SEE) immune memory and/or logic devices capable of operating with a supply voltage of 2.5 volts or less to reduce power requirements and to withstand a variety of harsh environmental effects from long term Geosynchronous Earth Orbit (GEO), along with a variety of additional requirements.. As result, we are planning to demonstrate an Ultra Low Power (ULP) SRAM architecture integrated with an innovative radiation hardening techniques in the Phase I program. The ULP SRAM will be designed to support both high performance and ULP modes of operation.
Benefit: It is anticipated that the Phase I work will demonstrate the feasibility of our innovative ULP/Rad-Hard SRAM architecture. In Phase II, we will optimize the designs developed in Phase I and then fabricate prototype devices, which will be thoroughly evaluated for meeting the ULP and rad-hard performance requirements. Development of a ULP/Rad-Hard SRAM device is paramount to fulfill military (and other agencies) needs in support of communication satellites, avionics, and ground terminals, which can also be applied to equivalent commercial applications.
Keywords: Ultra Low Power (Ulp), Radiation Hardened (Rad-Hard), Sram, Memory, Geosynchronous Earth Orbit (Geo) Operation, Satellite Communications.
