SBIR-STTR Award

This Small Business Innovation Research (SBIR) Phase I project proposes to demonstrate technical feasibility of a high-speed Vertical Electro-absorptive Modulated Laser (V-EML) for high-speed interconnects. This novel technology is built on the VCSEL (Vertical Cavity Surface Emitting Laser) concept and has all of its nominal advantages such as low-power consumption, on-wafer testability, and possibility of two-dimensional arrays. This technology should eliminate the complications associated with direct modulation of the VCSEL at high speeds. Modulation will be done externally by an electro-absorptive modulator that is integrated with the VCSEL either in a hybrid fashion or monolithically. This approach allows clean modulation without overshoot at speeds higher than 10 Gbps and easily reaching 40 Gbps. Furthermore, by decoupling the modulation issues from VCSEL emission, it provides additional design freedom for achieving extra stability, lower noise and higher reliability. This concept is expected to strongly impact the chip to chip and board to board interconnect industry by virtually removing modulation speed limit and minimizing signal distortion of the optical transmitter. Vertical laser sources in general have cost and size advantages over horizontal emitters in low to medium-power single-device applications. They also lend themselves more easily to two-dimensional array fabrication. The V-EML concept further removes the limitations of direct modulation from these devices. With external modulation, the V-EML can be driven by simpler electronics and at higher speeds. The application that this work is intended for is high-speed interconnects. This can either be in the form of backplane connections, distributed board-to-board connections or chip-to-chip optical interconnects (C2OI). VCSEL arrays known as "smart pixels" have been proposed and tested for such applications. A major impact of this technology is that it will help to remove the chip and board boundaries as significant obstacles to data transport, and will make possible truly distributed and scalable systems of the future. The high-speed interconnects optical communications market size is estimated to be more than $9 billion in 2010

This SBIR Phase II project aims to fabricate and commercialize a Vertical Electro-absorptive Modulated Laser (V-EML) for high-speed (up to 40Gbps) optical interconnects for chip-to-chip, board-to-board, and intra-rack optical applications. Compared to current electrical data buses using copper interconnects or conventional fiber optic links, the V-EML will enable the fabrication of higher speed, lower cost, lower power consumption and smaller optical transmitters for multi-channel fiber optic data buses in computer and communication networks. This technology virtually removes the modulation speed limit of VCSEL optical transmitters. At the same time it maintains high channel density at low cost. The low power consumption of the V-EML (~20 mW) and its potential low cost in volume (~$1.0) will provide a solution to the interconnect speed and power barriers in multiprocessor computers and servers. An array spacing of 50 to 100 microns will be possible with V-EMLs. This means that an 8x8 array with 2.5 Tbps of capacity has less than 1.0 mm2 of footprint. This offers substantial space savings over the existing copper interconnect technology and creates another strong incentive for transition. This technology could provide societal benefits from the commercialization of this technology by enabling faster and more widespread deployment of broadband services. The potential for ultra-fast delivery of audiovisual information is enormous as the V-EML technology helps to remove data-com bottlenecks. Educational and scientific benefits of the V-EML development arise in the area of supercomputers with sufficient computing power for complex scientific simulations. Applications include climate modeling for better predictions, molecular level modeling such as protein folding in medicine, ecosystem modeling in agriculture, and large-scale analysis of business information and economic statistics. These computers could then operate much faster and much more efficiently when interconnect speed limits are increased.