SBIR-STTR Award

Optoelectronic Chip-to-Chip Interconnect Technology Development for Radiation Hard Space Applications
Award last edited on: 4/7/2006

Sponsored Program
SBIR
Awarding Agency
DOD : MDA
Total Award Amount
$1,599,961
Award Phase
2
Solicitation Topic Code
AF02-036
Principal Investigator
Peter S Guilfoyle

Company Information

Zephyr Photonics Inc (AKA: OptiComp Corporation)

215 Elks Point Road
Zephyr Cove, NV 89448
   (775) 588-4176
   sales@zephyrphotonics.com
   www.zephyrphotonics.com
Location: Single
Congr. District: 02
County: Douglas

Phase I

Contract Number: ----------
Start Date: ----    Completed: ----
Phase I year
2002
Phase I Amount
$99,961
The primary goal of the proposed Phase I SBIR effort is to develop high speed, highly dynamic chip-to-chip interconnects utilizing hybrid waveguides and GaAs based VCSEL and photodetector technology in order to relieve the chip-to-chip interconnect bottleneck. The interconnects are accomplished using a unique distributed switching architecture that is low cost, fault tolerant, redundant, format independent, and dynamically reconfigurable. This architecture and the associated hardware can be readily implemented to realize high speed, dynamic chip-to-chip interconnects for demanding computing and signal processing applications. OptiComp Corporation occupies a 7,000 square foot facility which includes a full service, backend semiconductor fabrication cleanroom and optoelectronic device integration laboratory, a optoelectronic testing area, and a MBE based growth facility. OCC?s design center includes optoelectronic based modeling software for VCSELs and waveguide structures, as well as full EDA schematic capture and mask and PCB layout. These facilities support optoelectronic device modeling and design, growth, fabrication, integration, and test.

Benefits:
The proposed program will offer a dual-use commercialization opportunity for high speed chip-to-chip interconnects because it will provide a low cost solution that is highly dynamic, redundant, fault tolerant, and format independent. This chip-to-chip interconnect scheme has significant market potential, especially for demanding military and commercial interconnects.

Phase II

Contract Number: ----------
Start Date: ----    Completed: ----
Phase II year
2003
Phase II Amount
$1,500,000
The primary goal of the proposed Phase II effort is to develop monolithic distributed optoelectronic crossbar modules for implementation of high performance distributed crossbar backplanes. The high density monolithic crossbar modules will enable distributed backplane architectures that are highly scalable. In addition, the distributed crossbar modules will provide backplanes that are high speed, low latency, fault tolerant, protocol independent. The monolithic crossbar modules will be realized using the company's optoelectronic integrated circuit technologies. Anticipated Benefits/Commercial Applications: The proposed program will offer a dual-use commercialization opportunity for high performance backplanes because it will provide a transparent, high speed, protocol independent system which can be readily implemented into both military and commercial backplane applications. The program technology has significant commercial potential with projected optical backplane sales of $1.95 billion in 2008. Other potential markets, such as LANSs, MANs, WANs, and SANs, significantly increase the commercial potential of the technology.

Keywords:
optoelectronic crossbar, optical backplane, distributed switching, fault tolerant, optoelectronic integrated circuit, VCSELs, resonant cavity photodetectors, monolithic integration

Keywords:
VCSEL, waveguide, resonant cavity detector, chip-to-chip interconnects, redundancy, fault tolerance, dynamic interconnect, reduced latency, sol-gel