Growth in integration and power consumption levels of integrated circuits and the increase in portable and remote electronics applications have stimulated significant efforts in the area of low power electronics. Use of silicon-on-insulator (SOI) is a primary approach to simultaneously achieve increased circuit density, reduced power consumption, and improved performance in a cost effective manner. A significant aspect regarding the end user implementation of SOI substrates is the lot-to-lot reliability obtained from the SOI supplier, especially with regard to the background doping (NB) of the top silicon layer. An opportunity exists to carefully search for, statistically process, develop testing methods for and correlate parameters of a new thin buried oxide (BOX) SIMOX manufacturing process in order to determine factors which contribute to the variation of B, P in the silicon layer of SIMOX SOI substrates. The Phase 1 will establish new applications of electrical conductivity measurements for identification and reduction of contamination sources in SIMOX SOI processing via SPC methods. The Phase 2 research and development will concentrate on the contamination reduction and an implementation of low B SOI substrates for fabrication in gate oxide integrity testing. The research effort may lead to SEMI standards for SIMOX contamination specifications. COMMERCIAL APPLICATIONS: The nation may expect to benefit from a new application of electrical characterization for reduced contamination in SIMOX SOI with a United States manufacturing base. Advanced SOI CMOS circuitry with improved gate oxide integrity will result.
