A novel semiconductor device encapsulation technology is suggested which has significant advantages in the areas of environmental protection,heat dissipation, hermeticity, and overall packaging. The key innovation of the process is the bonding of a device wafer (sensor or IC) to a planar cover-wafer which contains through-wafer interconnects. The cover wafer and interconnects are fabricated entirely from Si using essentially standard semiconductor processing technology. The device wafers are sealed within the cover and are thus protected from the outside environment. The encapsulated sensors and ICs can be surface mounted to a header or board without external wires. This allows part of packaging to be accomplished at the wafer level, enabling the benefits of batch fabrication to be applied to the package. In Phase I, Si cover-wafers with through-wafer interconnects were fabricated successfully, thus demonstrating the feasibility of the concept.
