SBIR-STTR Award

Latch-up in a large digital system can be isolated to a small portion of the total die area. In success cases, the increase in current drawn from the supply is not distinguishable from the much larger average current consumed by normal operation. This makes it difficult to detect micro-latch-up by observing the current consumption of the entire chip. We propose a technique which senses the voltage differences across the source to bulk junction of the transistor. This signal in turn is used to control a local switch to the power supply of the effected circuits. When a micro-latch-up condition is detected the affected block of logic will be power cycled to alleviate the latch-up condition