SBIR-STTR Award

Data Converter Systems on Chip
Award last edited on: 3/31/2021

Sponsored Program
SBIR
Awarding Agency
DOD : Army
Total Award Amount
$699,968
Award Phase
2
Solicitation Topic Code
A18-009
Principal Investigator
Kent Smith

Company Information

Silicon Technologies Inc

4568 South Highland Drive Suite 300
Salt Lake City, UT 84117
Location: Single
Congr. District: 03
County: Salt Lake

Phase I

Contract Number: W15QKN-19-P-0017
Start Date: 00/00/00    Completed: 00/00/00
Phase I year
2019
Phase I Amount
$99,999
Silicon Technologies will design and simulate in Verilog-AMS and Cadence Spectre an ADC, two DACs, a serial interface and other circuits to be built on a single chip in a ITAR complaint manufacturing process. The ARMY is interested in this development for use in a SWAP-C ASIC for next generation fuse proximity sensors and other programs.STI proposes to use an existing pipelined ADC that has been built both as a stand-alone 0.9V, 100MSPS, and 12-bits ADC and as part of a System on a Chip (SOC) with Northrop Grumman Aerospace systems.STI will modify this existing design to run at 3.3V, 20MSPS, and 12-bits.The two DACs, the serial interface and other circuits will be modifications of proven existing designs. To minimize design and layout time, STI shall use its ADONIS Analog Cell Library built in the DARPA CRAFT program. The cell set contains the basic components required for the design of the ADC including single transistors, multiple groups of single transistors, hierarchical cells such as operational amplifiers, bias generators, voltage references, resistors and capacitors. This new proprietary design technology puts STI in a unique position to satisfy the requirements for this program.

Phase II

Contract Number: W15QKN-20-C-0026
Start Date: 00/00/00    Completed: 00/00/00
Phase II year
2020
Phase II Amount
$599,969
The Army requires a SWAP-C update of the M734A1 multi-option fuze circuit used in 60mm, 81mm, and 120mm mortar shells. Silicon Technologies Inc. (STI) has successfully developed a SWAP-C replacement that reduces the power used in the current system by 3X, reduces part count by 2X and part cost by 10X, reduces the weight by a minimum of 2X and the size of the current system used for fuse applications. Silicon cost for the chip will be less than $0.25 in volume production and will use less than 40 milliwatts (mW) while using a single 1.8-volt (V) power supply. STI has created novel design architecture to be the first product in a new family of low power Data Converters on a Chip ASICs. The ASIC shall be built using STI’s proprietary ADONIS technology which will provide the Army, its Primes, and other customers the ability to port the ADC to other processes at reduced cost and risk. The STI Data Converters on a Chip ASIC will allow customers to incorporate the design as intellectual property (IP) for their system-on-chip (SOC), or to engage STI to develop the IP further as a chip specific to their needs.